Because of the shrinking of the LTCC tapes during the firing it is very necessary to observe various design rules. This part is based on a few design guides published from the following manufacturers / processors:
- DuPont: LTCC-Technology Design And Layout Guideline Green Tape System (EKP,12.8.1998);
- CTS Microelectronics: Low-Temperature Cofired Ceramic Design And Layout Guidelines For The Fabrication Of Networks, Packages and Multichip Modules;
- National Semiconductor: Design Rules For Physical Layout Of Low Temperature Co-Fired Ceramic Modules (Version_8.1);
- Scrantom Engineering Inc.: Low Temperature Cofired Ceramic Design Guidelines (Rev. C);
- Siegert electronic GmbH: Design Rules For LTCC (Rev. C);
- Sorep-Erulec: General Design Guide For LTCC Substrates (8-jan-99).
All called numbers are average values and ranges and may vary from one to the other system; these rules depend on both material and process properties. This paper doesn't intend to describe all known design rules; it should only give an idea about the possibilities of LTCCs.
Terminology
 |
1 : Top Side External Conductor
2 : Cofired or Postfired Surface Resistor
3 : Buried Resistor
4 : Buried Via
5 : Buried Capacitor
6 : Stacked Vias
7 : Blind Via |
|
A : Via Cover Pad
B : Via Diameter
C : Via Stagger
D : Via Spacing
E : Via Pitch
F : Via Center To Part Edge |
|
|
|
 |
A : Line Pitch
B : Line Spacing
C : Line Width
D : Conductor To Part Edge / Edge To Feature
E : Via To Conductor Line Spacing
F : Via Center To Part Edge
G : Line To Cavity Wall Spacing
H : Cavity Size
I : Cavity Wall To Part Edge Spacing |
|
|
Standard |
|
Possible |
| Edge To Feature in um |
|
500 |
|
250 |
|
|
|
|
|
| Line Width in um |
|
200 |
|
100 |
| Line Width in um (Fine Line Process) |
|
50 |
|
50 |
| Line Spacing in um |
|
200 |
|
100 |
| Line Spacing in um (Fine Line Process) |
|
50 |
|
50 |
| Line Pitch in um |
|
400 |
|
200 |
| Line To Cavity Wall Spacing in um |
|
400 |
|
/ |
|
|
|
|
|
| Via Diameter in um |
|
250 |
|
100 |
| Via Coverpad / Catchpad |
|
2x via diameter |
|
via diam. 25um |
| Via Spacing in um |
|
200 |
|
175 |
| Via Pitch in um |
|
400 |
|
300 |
| Via Stagger |
|
1.5x via diameter |
|
/ |
| Via To Cavity Wall Spacing in um |
|
550 |
|
300 |
| Via Geometry |
|
Round + Rectangular |
|
Round + Rectangular |
| Via Types |
|
blind, buried, stacked |
|
blind, buried, stacked |
| Thermal Via Coverage in % |
|
15 |
|
30 |
|
|
|
|
|
| Min. Resistor Dimensions in mm |
|
1 x 1 |
|
0.5 x 0.5 |
| Min. Resistor Overlap in um |
|
300 |
|
200 |
| Min. Width After Trimming in um |
|
300 |
|
200 |
| Tolerance After Trimming (Surface / Buried) |
|
+/- 2% / +/- 25% |
|
+/- 1% / x |
| Ground / Power Plane Coverage |
|
50% |
|
75% |
| Opening For Feed Through (length in um) |
|
750 |
|
350 |
|
|
|
|
|
| Max. Number Of Layers |
|
Depends on Thickness (10 - 50) |
|
Depends on Thickness (10 - 50) |
| Min. Number Of Layers |
|
Depends on Thickness (2 - 4) |
|
Depends on Thickness (2 - 4) |
| Circuit Shapes |
|
Rectangular, special shapes possible |
|
Rectangular, special shapes possible |
| Size Tolerance |
|
+/- 0.5% |
|
+/- 0.25% |
|
|
|
|
|
| Cavity's Shape |
|
Rectangular, circular, special shapes possible |
|
Rectangular, circular, special shapes possible |
| Min. Floor Thickness in um |
|
450 |
|
200 |
| Max. Cavity Depth in um |
|
1500 |
|
2500 |
| Min Cavity Size in um |
|
1000 |
|
500 |
| Max. Cavity Size in um |
|
Depends on layout |
|
Depends on layout |
| Cavity Wall To Part Edge Spacing in um |
|
>1000 |
|
/ |
| Bond Pad / Conductor Discoverage in um |
|
750 |
|
/ |
| Cavity Wall To Conductor Spacing in um |
|
400 |
|
/ |
| Cavity Wall To Via Spacing in um |
|
2.5x via size |
|
/ |
| Cavity Wall To Pad Spacing in um |
|
250 |
|
/ |
| Spacing Between Two Cavities in um |
|
1270 |
|
/ |
|
|
|
|
|
| Window's Shape |
|
Rectangular, circular, special shapes possible |
|
Rectangular, circular, special shapes possible |
| Window Depth in um |
|
< 2000 |
|
> 2000 |
| Min. Window Size (length in um) |
|
1000 |
|
500 |
| Max. Window Size (length in um) |
|
Depends on layout |
|
Depends on layout |
| Pitch Of BGA / LGA I/Os in mm |
|
2.54 |
|
0.635 |
| Wire Bonding Pitch in um |
|
500 |
|
150 |
| Solder Pad Pitch in um |
|
400 |
|
250 |
| Flip Chip Bonding Pitch in um |
|
400 |
|
250 |
|
|
Standard |
|
Possible |
| Cavity's Shape |
|
Rectangular, circular, special shapes possible |
|
Rectangular, circular, special shapes possible |
| Min. Floor Thickness in um |
|
450 |
|
200 |
| Max. Cavity Depth in um |
|
1500 |
|
2500 |
| Min Cavity Size in um |
|
1000 |
|
500 |
| Max. Cavity Size in um |
|
Depends on layout |
|
Depends on layout |
| Cavity Wall To Part Edge Spacing in um |
|
>1000 |
|
/ |
| Cavity Wall To Bond Pad Spac. in um (B) |
|
250 |
|
/ |
| Bond Pad / Conductor Discover. in um (A) |
|
750 |
|
/ |
| Cavity Wall To Conductor Spac. in um (C) |
|
400 |
|
/ |
| Cavity Wall To Via Spacing in um (D) |
|
2.5x via size |
|
/ |
| Cavity Wall To Pad Spacing in um (E) |
|
250 |
|
/ |
| Spacing Between Two Cavities in um |
|
1270 |
|
/ |